The disclosure relates generally to integrated circuit (IC) structures, including static random access memory (SRAM) structures, in addition to processes for electrically connecting two or more IC structures. Processes according to the present disclosure can form embodiments of the IC structures described herein.
In integrated circuit (IC) structures, a transistor is a critical component for implementing digital circuitry designs. Generally, a transistor includes three electrical terminals: a source, a drain, and a gate. By applying different voltages to the gate terminal, the flow of electric current between the source and the drain can be turned on and off. A common type of transistor is a metal oxide field effect transistor (MOSFET). One type of MOSFET structure is a “FinFET,” typically formed upon a semiconductor-on-insulator (SOI) layer and buried insulator layer. A FinFET can include a semiconductor structure etched into a “fin” shaped body, with one side of the fin acting as a source terminal and the other side of the fin acting as a drain terminal. A gate structure, which may be at least partially conductive, can be formed around one or more of the semiconductor fins. By applying a voltage to the gate structure, an electrically conductive channel can be created between the source and drain terminals of each fin in contact with the gate. In some IC structures, it may be desirable to orient one or more FinFETs in a vertical direction, i.e., substantially perpendicular to the plane of a substrate material, such that the gate of the FinFET intersects with the fin in a horizontal plane.
Several transistors, including FinFET transistors, can be electrically connected to each other to provide fundamental elements of a digital circuit's architecture. One type of digital circuit element is random access memory (RAM), which can be provided as either “static RAM” (SRAM) or “dynamic RAM” (DRAM). An SRAM cell typically includes six transistors, four of which can be wired to form two cross-coupled voltage inverters for storing binary digits (also known as “bits”) in the form of “high” and “low” voltages, i.e., voltages above or below a predetermined threshold. The remaining two transistors in an SRAM structure can be known as “access transistors,” so named because these transistors can control electrical access to the SRAM cell during read and write operations. Reducing the size of memory components in an IC, including SRAM cells, can allow more bits to be stored on one product and thereby reduce manufacturing costs per bit of storage.